The present invention relates to power supply circuits. More particularly, the present invention relates to a output stage compensation method and circuit, such as may be used with low drop-out regulators or other output stage circuits.
The increasing demand for higher performance power supply circuits has resulted in the continued development of voltage regulator devices. Many low voltage applications are now requiring the use of low dropout (LDO) regulators, such as for use in cellular phones, pagers, laptops, camera recorders and other mobile battery operated devices as power supply circuits. These portable electronics applications typically require low voltage and quiescent current flow to facilitate increased battery efficiency and longevity. The alternative to low drop-out regulators are switching regulators which operate as dcxe2x80x94dc converters. Switching regulators, though similar in function, are not preferred to low dropout regulators in many applications because switching regulators are inherently more complex and costly, i.e., switching regulators can have higher cost, as well as increased complexity and output noise than low drop-out regulators.
Low drop-out regulators generally provide a well-specified and stable dc voltage whose input to output voltage difference is low. Low drop-out regulators are generally configured for providing the power requirements, i.e., the voltage and current supply, for any downstream portion of the electrical circuit. Low drop-out regulators typically have an error amplifier in series with a pass device, e.g., a power transistor, which is connected in series between the input and the output terminals of the low drop-out regulator. The error amplifier is configured to drive the pass device, which can then drive an output load.
To provide for a more robust low drop-out regulator, a large load capacitor is provided at the output of the low drop-out regulator. However, using large capacitors at the output of the low drop-out regulator requires a significant amount of board area, as well as increases manufacturing costs. Further, larger capacitors can tend to slow the response time down of the low drop-out regulator.
For example, with reference to FIG. 1, a prior art circuit 100 implementing a low drop-out regulator is illustrated. Circuit 100 includes a low drop-out regulator 102 coupled to a downstream circuit device, e.g., a digital signal processor (DSP) 104. At the input of low drop-out regulator 102 is a supply voltage VIN, such as a low voltage battery supply of 3.3 volts or less, and an input capacitor C1. At an output VOUT of low drop-out regulator 102, a regulated output of, for example, 2.5 volts can be provided to the downstream circuit elements and devices. In addition, a large load capacitor C2 is provided at output VOUT Of low drop-out regulator 102. In addition to enabling low drop-out regulator 102 to be more robust, load capacitor C2 can provide compensation to low drop-out regulator 102 to enable low drop-out regulator 102 to work properly. This compensation of low drop-out regulator 102 can be highly sensitive to the configuration of capacitor C2.
Downstream elements and devices are coupled to output VOUT of low drop-out regulator 102 through various circuit traces and wiring connections. Capacitor C2 also serves as an input capacitor to DSP 104. As the input capacitor, designers of applications for DSP 104 typically require capacitor C2 to comprise between 10 xcexcF and 100 xcexcF of capacitance to facilitate noise reduction in DSP 104. Thus, in most applications, capacitor C2 is based on the bypass requirement of the downstream circuit and components, such as DSP 104, rather than the compensation requirements of low drop-out regulator 102. As a result, the design of low drop-out regulator 102, including the compensation requirements, is generally limited by the bypass requirements of the downstream circuit devices and elements.
Input capacitance devices, such as capacitor of DSP 104, also include an equivalent series resistance (ESR) that must be accounted for in the design of low drop-out regulator 102. Further, for downstream circuits with high transient requirements, the total capacitance is ideally configured to tailor the overshoot and undershoot of low drop-out regulator 102. In many instances, the design of a compensation circuit for low drop-out regulator 102 can involve substantial guesswork as to the range of total capacitance, and the ESR of such capacitance, expected to be included within the downstream circuit. Thus, prior art low drop-out regulators, and their required compensation, are generally configured for a particular range of ESR and total capacitance for downstream circuit devices. As a result, circuit designers must pick and choose a particular low drop-out regulator configured for a given ESR and total capacitance of a downstream circuit application.
In addition to the need to identify the capacitance requirements of the downstream circuit in designing the compensation circuit for low drop-out regulator 102, it is also necessary to address poles created within a low drop-out regulator. Whenever a pole is introduced in the frequency response, the gain of low drop-out regulator decreases by more than 20 dB/decade. Poles can be generated or caused by various sources, and occur at various locations within the frequency response of a low drop-out regulator or other output stage circuit. For example, one pole comprising a dominant pole often occurs at a very low frequency, such as 10 Hz; another pole can often occur from an internal loop; and yet another pole can be caused by various parasitics and the gm in the low drop-out regulator, e.g., the additional pole can be caused in some topologies by the interaction of the low gm of the error amplifier with the gate capacitance of the typically large common source pass device. With reference to FIG. 2, three such poles are illustrated. However, the frequency responses of low drop-out regulators can include fewer or additional poles to the three types discussed above.
While many poles can be partly addressed through use of bandwidth limitations, the poles caused by various parasitics and the amount of current utilized in driving the pass device of the low drop-out regulator 102 are difficult to compensate. While one configuration may work well for low current operation, the same configuration does not work well for high current operation.
Accordingly, a need exists for an output stage compensation method and circuit for low drop-out regulators that can overcome the various problems of the prior art.
The method and circuit according to the present invention addresses many of the shortcomings of the prior art. In accordance with various aspects of the present invention, an output stage compensation circuit and method for a low drop-out regulator configured to facilitate stable operation while providing output voltage and current to downstream circuit devices is provided.
In accordance with an exemplary embodiment, an exemplary low drop-out regulator is configured with an output stage compensation circuit comprising one or more segmented sense devices configured to drive one or more current sources. Each segmented sense device is configured to compensate a suitable range of output current. In addition, one or more segmented sense devices can be configured to multiply the effect of compensation capacitors coupled to one or more segmented sense devices. During operation, one or more segmented sense devices can be configured to provide pole-zero compensation by introducing a zero in the open-loop gain of the low drop-out regulator at the appropriate frequency and level of output current. As a result, the stability of the low drop-out regulator is not dependent upon the output current requirements or the capacitance of the load capacitor. Further, the load capacitor can be suitably configured to address the transient response of the downstream circuit devices.
In accordance with another exemplary embodiment, the various ranges of output current can be overlapped when being compensated by a plurality of segmented sense devices. Further, the plurality of segmented sense devices can be suitably scaled at different levels depending on a desired compensation effect.
In accordance with another aspect of the present invention, the output stage compensation scheme significantly reduces die area required for compensation. For example, through the transient nature of operation of segmented current sense devices 530, 532, 534, 536 and 538, a multiplication of the effects of compensation capacitors C1, C2, C3, C4 and C5 occurs during compensation.
In accordance with another aspect of the present invention, the output stage compensation scheme results in very low quiescent current, along with a very high effective beta, i.e., the ratio of the output current to the quiescent current is high.